JPS6223097Y2 - - Google Patents

Info

Publication number
JPS6223097Y2
JPS6223097Y2 JP1981093946U JP9394681U JPS6223097Y2 JP S6223097 Y2 JPS6223097 Y2 JP S6223097Y2 JP 1981093946 U JP1981093946 U JP 1981093946U JP 9394681 U JP9394681 U JP 9394681U JP S6223097 Y2 JPS6223097 Y2 JP S6223097Y2
Authority
JP
Japan
Prior art keywords
resin
lead frame
semiconductor device
plastic package
soft
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1981093946U
Other languages
English (en)
Japanese (ja)
Other versions
JPS58440U (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP9394681U priority Critical patent/JPS58440U/ja
Publication of JPS58440U publication Critical patent/JPS58440U/ja
Application granted granted Critical
Publication of JPS6223097Y2 publication Critical patent/JPS6223097Y2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP9394681U 1981-06-25 1981-06-25 プラスチツクパツケ−ジ Granted JPS58440U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9394681U JPS58440U (ja) 1981-06-25 1981-06-25 プラスチツクパツケ−ジ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9394681U JPS58440U (ja) 1981-06-25 1981-06-25 プラスチツクパツケ−ジ

Publications (2)

Publication Number Publication Date
JPS58440U JPS58440U (ja) 1983-01-05
JPS6223097Y2 true JPS6223097Y2 (en]) 1987-06-12

Family

ID=29888902

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9394681U Granted JPS58440U (ja) 1981-06-25 1981-06-25 プラスチツクパツケ−ジ

Country Status (1)

Country Link
JP (1) JPS58440U (en])

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0744241B2 (ja) * 1984-02-06 1995-05-15 日東電工株式会社 半導体装置載置基板の製造方法
JPH0334920Y2 (en]) * 1986-06-30 1991-07-24
JPH0526760Y2 (en]) * 1987-03-11 1993-07-07
US7719096B2 (en) * 2006-08-11 2010-05-18 Vishay General Semiconductor Llc Semiconductor device and method for manufacturing a semiconductor device

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5336518B2 (en]) * 1972-05-15 1978-10-03
JPS571300Y2 (en]) * 1976-06-25 1982-01-09
JPS5461556U (en]) * 1977-10-07 1979-04-28

Also Published As

Publication number Publication date
JPS58440U (ja) 1983-01-05

Similar Documents

Publication Publication Date Title
KR960009136A (ko) 반도체 패키지 및 그 제조방법
KR960019676A (ko) 수지 봉지형 반도체 장치 및 그 제조 방법
JPS6223097Y2 (en])
JPH04249348A (ja) 樹脂封止型半導体装置およびその製造方法
JPH0254665B2 (en])
JPS60136347A (ja) 半導体装置およびその製造方法
JPH04340751A (ja) 樹脂封止型半導体装置
JP3134445B2 (ja) 樹脂封止型半導体装置
JPH0135478Y2 (en])
JPS5986251A (ja) 樹脂封止型半導体装置用リ−ドフレ−ム
JPS60175433A (ja) 樹脂封止型半導体装置の製造方法およびリ−ドフレ−ム
JP2601033B2 (ja) 樹脂封止型半導体装置およびその製造方法
JPS60229352A (ja) 樹脂封止形半導体装置および樹脂封止方法
JPS635250Y2 (en])
KR200148634Y1 (ko) 반도체 패키지
KR950000101Y1 (ko) 반도체 패키지용 리드 프레임
KR940008328B1 (ko) 필름 타입 반도체 패키지(F-PAC : Film-Type Package) 및 그 제조 방법
JPS6246268Y2 (en])
JPH02246143A (ja) リードフレーム
KR930008864B1 (ko) 반도체 패키지 및 그 제조방법
JPH02202042A (ja) 樹脂封止型半導体装置
KR830002464B1 (ko) 수지 밀봉형 반도체의 제조방법
JPS6112682Y2 (en])
KR0119764Y1 (ko) 반도체 패키지
JPS6046058A (ja) 半導体装置